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Digital, Mixed-signal and Integrated Power Circuits and Architectures
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Sarah Miller

September 15, 2022 by Sarah Miller

So long Seattle, Hello Atlanta! : PSyLab moves to Georgia Tech

Sep 15, 2022

After 9 wonderful years at UW and in the wonderful city of Seattle. We at PSyLab will be moving to our new home at the Georgia Institute of Technology in Atlanta. We look forward to rewarding collaborations as we continue our exploration at the intersection of technology, design, architecture and systems toward the design of future computing systems and implantable electronics. Our sincere thanks to all the faculty that we had the pleasure of working with at the University of Washington, and the members of the staff at UW without whom we’d never be able to get around to getting work done.

Visvesh has moved to GT as of this fall. PSyLab Ph.D students will move in Jan 2023. Our MS students will continue their guided research at UW through the 2022-2023 under Visvesh’s guidance.

Filed Under: News

September 15, 2022 by Sarah Miller

Hikmet Seha Ozturk joins PSyLab – Welcome Seha!

Sep 15, 2022

PSyLab welcomes Seha to PSyLab!

Filed Under: News

February 19, 2022 by Sarah Miller

An Optimal Digital Beamformer for mm-Wave Phased Arrays with 660MHz Instantaneous Bandwidth in 28nm CMOS

ISSCC 2022 | Diego Peña-Colaiocco, Chi-Hsiang Huang, Kun-Da Chu, Jacques C. Rudell, and Visvesh Sathe

Filed Under: Publications

February 19, 2022 by Sarah Miller

Energy Minimization of Duty-Cycled Systems Through Optimal Stored-Energy Recycling from Idle Domains

ISSCC 2022 | Chi-Hsiang Huang, Arindam Mandal, Diego Peña-Colaiocco, Edevaldo Pereira Da Silva, and Visvesh Sathe

regen_breakingDownload

Filed Under: Publications

April 19, 2021 by Sarah Miller

A 46-channel Vector Stimulator with 50mV Worst-Case Common-Mode Artifact for Low-Latency Adaptive Closed-Loop Neuromodulation

CICC 2021 | A. Mandal, D. Pena-Colaiocco, V. Pamula, K. Khateeb, L. Murphy, A. Yazdan, S. Perlmutter, F. Pape, J. Rudell, V. Sathe

A_46-channel_Vector_Stimulator_with_50mV_Worst-Case_Common-Mode_Artifact_for_Low-Latency_Adaptive_Closed-Loop_NeuromodulationDownload

Filed Under: Publications

December 17, 2018 by Sarah Miller

On-Chip Power Supply Measurement

An all-digital gated ring-oscillator based power supply monitor relying on deterministic dither for enhanced resolution.

Supply-noise measurement techniques are becoming increasingly critical in modern digital design, driven by the trend toward smaller, lower-voltage domains. All-digital measurement modules capable of meeting bandwidth and resolution requirements would enable spatially fine supply voltage measurements across Systems-on-Chip. Existing implementations either use analog techniques, limiting their applicability, or do not meet the increasingly challenging requirements of supply noise measurement. In this paper we discuss a bandwidth-resolution-reconfigurable all-digital system that relies on a dithering technique to achieve a resolution of 2.05 mV at a bandwidth of 6.94 GHz in an industrial 65 nm CMOS process.

Filed Under: Energy-Efficient Computing, Research

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